DOI | Resolve DOI: https://doi.org/10.1016/0039-6028(94)90971-7 |
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Author | Search for: Taylor, R.P.1; Search for: Feng, Y.1; Search for: Sachrajda, A.S.1; Search for: Adams, J.A.1; Search for: Davies, M.1; Search for: Coleridge, P.T.1; Search for: Zawadski, P.1 |
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Affiliation | - National Research Council of Canada. NRC Institute for Microstructural Sciences
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Format | Text, Article |
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Subject | Electron transitions; Gates (transistor); Semiconducting aluminum compounds; Semiconducting gallium arsenide; Semiconductor device structures; Semiconductor quantum wells; Surfaces; Artificial impurity; Multilevel lateral nano-devices; Quantum dot; Quantum interference effects; Ring geometry; Semiconducting aluminum gallium arsenide; Surface gate patterns; Semiconductor device manufacture |
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Abstract | The design of surface gate patterns, used to define nanostructurcs in AlGaAs GaAs heterostructures, is greatly enhanced by the possibility of establishing electrical contact to, and independently biasing, a 100 nm wide isolated gate. We describe the fabrication of a multi-level metallisation architecture which can be used to contact a nanoscale central gate and monitor the transition from a quantum dot to ring geometry. We employ geometry induced quantum interference effects as a novel low temperature characterisation tool and report experiments in which the central electrode acts as an artificial impurity. © 1994. |
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Publication date | 1994 |
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In | |
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Language | English |
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Peer reviewed | Yes |
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NPARC number | 21274634 |
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Export citation | Export as RIS |
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Report a correction | Report a correction (opens in a new tab) |
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Record identifier | 1af138e6-6c21-4920-9cd5-05e5a0adcd1f |
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Record created | 2015-03-18 |
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Record modified | 2020-04-27 |
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